Within the field of circuits and semiconductors, various electrical features of different circuit devices, such as field effect transistors (FETs), metal-oxide-semiconductor (MOS) capacitors, diodes, etc., cause quiescent current leakages and static power consumption. When the gate voltage of a FET device (i.e., the voltage difference between the gate and the source of the FET device) is larger than the threshold voltage of the FET, a large amount of electric current (also called drain current) can travel from the source to the drain. When the gate voltage applied to the FET is less than the threshold voltage, the amount of current traveling from the source to the drain (called sub-threshold drain current) is small but not zero.
Since the non-switch time in logical circuits is much longer than switch time, the accumulated sub-threshold drain current becomes non-negligible in a semiconductor chip. It is important to accurately determine total chip power in circuit design. There are instances that when the gate voltage applied to the FET is less than the threshold voltage, or even when there is no voltage applied to the gate, an amount of current still passes between the source and drain. This amount of current is known as the leakage current or “off” current and can affect the total chip power dissipation for a device. The leakage current, also known as IDDQ current, can be caused by various factors, such as diffusion, random doping fluctuation (RDF), line edge roughness (LER), etc.